#include <CGRA.h>
Definition at line 76 of file CGRA.h.
◆ CGRA()
CGRA::CGRA |
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std::string |
name = "CGRA" , |
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std::string |
templateName = "cgra" |
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) |
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◆ genBitStream()
◆ genFloorPlan()
void CGRA::genFloorPlan |
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◆ genHybrid()
void CGRA::genHybrid |
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VerilogType |
vt, |
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std::string |
dir, |
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int |
mem_size |
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) |
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◆ genTimingConstraints()
void CGRA::genTimingConstraints |
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OpGraph * |
mappped_opgraph | ) |
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◆ genVerilog()
void CGRA::genVerilog |
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VerilogType |
vt, |
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std::string |
dir, |
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const int & |
SII |
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) |
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◆ getMRRG()
const MRRG & CGRA::getMRRG |
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int |
II | ) |
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◆ getNumCols()
◆ getNumRows()
◆ getTopLevelModule() [1/2]
Module& CGRA::getTopLevelModule |
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inline |
◆ getTopLevelModule() [2/2]
const Module& CGRA::getTopLevelModule |
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const |
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inline |
◆ setNumCols()
void CGRA::setNumCols |
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int |
numCols | ) |
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inline |
◆ setNumRows()
void CGRA::setNumRows |
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int |
numRows | ) |
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inline |
◆ adl0::ADL
◆ hybridPorts
std::vector<std::string> CGRA::hybridPorts |
◆ mrrgs
std::vector<std::shared_ptr<const MRRG> > CGRA::mrrgs = {} |
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private |
◆ num_floorplan_columns
int CGRA::num_floorplan_columns = 0 |
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private |
◆ num_floorplan_rows
int CGRA::num_floorplan_rows = 0 |
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private |
◆ top_level_module
std::unique_ptr<Module> CGRA::top_level_module |
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private |
The documentation for this class was generated from the following files:
- /media/maple_tb_disk/wicklun2/cgra-me-website/cgra-me/inc/CGRA/CGRA.h
- /media/maple_tb_disk/wicklun2/cgra-me-website/cgra-me/src/core/CGRA.cpp