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CGRA-ME
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This is the complete list of members for CGRA, including all inherited members.
| adl0::ADL class | CGRA | friend |
| CGRA(std::string name="CGRA", std::string templateName="cgra") | CGRA | |
| genBitStream(const Mapping &mapping) | CGRA | |
| genFloorPlan() | CGRA | |
| genHybrid(VerilogType vt, std::string dir, int mem_size) | CGRA | |
| genTimingConstraints(OpGraph *mappped_opgraph) | CGRA | |
| genVerilog(VerilogType vt, std::string dir, const int &SII) | CGRA | |
| getMRRG(int II) | CGRA | |
| getNumCols() | CGRA | inline |
| getNumRows() | CGRA | inline |
| getTopLevelModule() | CGRA | inline |
| getTopLevelModule() const | CGRA | inline |
| hybridPorts | CGRA | |
| mrrgs | CGRA | private |
| num_floorplan_columns | CGRA | private |
| num_floorplan_rows | CGRA | private |
| setNumCols(int numCols) | CGRA | inline |
| setNumRows(int numRows) | CGRA | inline |
| top_level_module | CGRA | private |
1.8.17